1. Field of the Invention
The present invention relates to a multi-layer circuit board for mounting an electronic element such as a semiconductor chip having connection electrodes arranged in the form of a lattice or a semiconductor device having external connection terminals arranged in an area array form.
2. Description of the Related Art
In modern semiconductor devices, the logic devices are becoming highly functional and highly integrated, feature more inputs and outputs, and are being mounted ever more densely. Therefore, products have been produced, to compensate for a lack of space for forming electrodes, by arranging electrodes like a lattice on the electrode-forming surface of a semiconductor chip.
FIG. 26 illustrates an example in which a semiconductor chip 4 is mounted on a circuit board 5 relying on an ordinary flip chip connection. The semiconductor chip 4 has electrodes 6 arranged on the peripheral edges thereof. Circuit patterns 7 are connected to every electrode 6 on a surface.
FIG. 27 illustrates the arrangement of lands 8 and circuit patterns 7 on a circuit board for mounting a semiconductor chip. In this example, the lands 8 are arranged in two sequences, the circuit patterns 7 connected to the lands 8 of the inner side are drawn running among the neighboring lands 8 on the outer side; i.e., the circuit pattern 7 is drawn from every land 8 on a surface.
When the electrodes are arranged in many sequences on the electrode-forming surface, however, it becomes no longer possible to take out the wiring from every land on the surface though it may vary depending upon the distance between the lands and the number of the lands.
In order to solve this problem, a method has been proposed according to which the circuit board for mounting a semiconductor chip is formed in many layers, and circuit patterns are suitably arranged on each of the circuit boards that are laminated to connect all electrodes of the semiconductor chip to the circuit patterns. FIG. 28 illustrates an example where a semiconductor chip 4, on which many electrodes 6 are arranged like a lattice, is mounted on a multi-layer circuit board. By using this multi-layer circuit board, it is possible to electrically connect all electrodes 6 arranged in the form of a lattice to the circuit patterns 7, 7a in order to electrically connect the external connection terminals 9 to the electrodes 6. In FIG. 28, reference numeral 7a denotes a circuit pattern of an inner layer, and reference numerals 5a to 5d denote first to fourth circuit boards.
When the semiconductor chip having electrodes arranged like a lattice is to be mounted on the circuit board, two or more circuit boards may be laminated one upon the other to form a multi-layer circuit board provided that the number of the electrodes is not very large. When the semiconductor chip has as many pins as, for example, 30.times.30 pins or 40.times.40 pins, however, six to ten circuit boards must be laminated one upon the other.
When the circuit boards on which the circuit patterns are very densely formed are to be laminated in many layers, there will be employed a high-density wiring method such as build-up method accompanied, however, by serious problems in regard to yield of the products, reliability and the cost of production. That is, when many circuit patterns are to be laminated one upon the other, vias are formed in each board to accomplish an electric connection between the circuit patterns and the circuit patterns across the board, and the boards are successively laminated, requiring a high degree of precision without at present, however, offering a high degree of reliability. When many boards are laminated, furthermore, it is required that none of the boards is defective, involving further increased technical difficulty.
To produce a multi-layer circuit board maintaining a good yield, therefore, a reduction in the number of wiring layers could be an effective solution.
The present invention is concerned with a multi-layer circuit board for mounting an electronic part such as a semiconductor chip having as many as 40.times.40 pins in the form of a lattice on the side of the mounting surface, or a semiconductor device having electrodes arranged in the form of a lattice on the side of the mounting surface.